ADI公司的AD9213是单路12位6 GSPS/10.25 GSPS RF ADC,输入带宽6.5GHz,支持需要宽瞬态带宽和低转换误差速率(CER)的高动态烦恼频率和时域应用.AD9213具有16路JESD204B接口,支持最大带宽功能.它具有动态范围和线性度性能时所消耗的功率小于4.6W.器件具有交错流水线架构,具有专有校准和随机技术,可压制交错伪信号影进入本底噪声.AD9213的噪声频谱密度为154dBFS/Hz,SFDR为68dBc (1GHz，−1dBFS),功耗低至5.1W(10Gsps 时),集成了输入缓冲器(6.5GHz 输入带宽),16 通道 JESD204B 输出(最高16 Gbps的线路速率),具有多芯片同步功能, 1 采样精度,提供DDC NCO 同步功能,支持高效 AGC 的快速超量程检测,集成 DDC,可选抽取系数,支持快速跳频,可选片内 PLL 时钟倍频器,集成了片内温度传感器和片内负电压发生器,其低CER <1e−16,采用12 mm × 12 mm BGA封装,主要用在,航空航天和防务,导弹和精确打击武器,航空航天,无人系统,电子监控和对抗,军事通信,雷达,相控阵以及仪器仪表和测量,通信测试设备,示波器和数字转换器数据采集,电子测试和测量,化学分析和分析仪器,自动测试设备和高速转换器.本文介绍了AD9213主要特性,功能框图和DDC详细框图,以及評估板ADS8-V1EBZ主要特性,电路图和材料清单.
The AD9213 is a single, 12-bit, 6 GSPS/10.25 GSPS, radio frequency (RF) analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9213 supports high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low conversion error rates (CER). The AD9213 features a 16-lane JESD204B interface to support maximum bandwidth capability. The AD9213 achieves dynamic range and linearity performance while consuming <4.6 W typical. The device is based on an interleaved pipeline architecture and features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor.
The linearity performance of the AD9213 is preserved by a combination of on-chip dithering and calibration, which results in excellent spurious-free performance over a wide range of input signal conditions. Applications that require less instantaneous bandwidth can benefit from the on-chip, digital signal processing (DSP) capability of the AD9213 that reduces the output data rate along with the number of JESD204B lanes required to support the device. The DSP path includes a digital downconverter (DDC) with a 48-bit, numerically controlled oscillator (NCO), followed by an I/Q digital decimator stage that allows selectable decimation rates that are factors of two or three. For fast frequency hopping applications, the AD9213 NCO supports up to 16 profile settings with a separate trigger input, allowing wide surveillance frequency coverage at a reduced JESD204B lane count. The AD9213 supports sample accurate multichip synchronization that includes synchronization of the NCOs. The AD9213 is offered in a 192-ball ball grid array (BGA) package and is specified over a junction temperature range of −20℃ to +115℃.
High instantaneous dynamic range NSD
−155 dBFS/Hz at 10 GSPS with −9 dBFS, 170 MHz input
−153 dBFS/Hz at 10 GSPS with −1 dBFS, 170 MHz input
SFDR: 70 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
SFDR excluding H2 and H3 (worst other spur): 89 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
Low power dissipation: <4.6 W typical at 10 GSPS
Integrated input buffer (6.5 GHz input bandwidth)
1.4 V p-p full-scale analog input with RIN = 50 Ω
16-lane JESD204B output (up to 16 Gbps line rate)
Multichip synchronization capable with 1 sample accuracy
DDC NCO synchronization included
Selectable decimation factors
16 profile settings for fast frequency hopping
Fast overrange detection for efficient AGC
On-chip temperature sensor
On-chip negative voltage generators
Low CER: <1 × 10−16
12 mm × 12 mm, 192-ball BGA-ED package
图2. AD9213 DDC详细框图
The ADS8-V1 Evaluation Board was developed to support the evaluation of Analog Devices High Speed Data Converters with JESD204B bit rates up to 16Gbps. This Wiki site provides a high level overview of the platform. In addition, each use-case of the board has its own section (e.g. Using the ADS8-V1 for High Speed A/D Converter Evaluation). The ADS8-V1 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS8-V1 is not intended to be used as a general purpose development platform, and no support is available for standalone operation. The ADS8-V1 may contain hardware features not fully productized or supported by our default customer evaluation configurations. Please refer to Xilinx and its approved distributors for general purpose FPGA Development Kits.
1. Xilinx KintexUltrascale XCKU040-3FFVA1156E FPGA.
2. One (1) FMC+ connector.
3. Twenty (20) 16Gbps transceivers supported by one (1) FMC+ connector.
4. DDR4 SDRAM.
5. Simple USB 3.0 port interface.