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ST SPC572L64EPower Architecture MCU汽車動力總成解決方案

1054 關鍵詞:  Power Architecture MCU 汽車動力總成 汽車電子 

ST公司的SPC572L64E是高性能32位汽车Power Architecture® MCU,设计主要用在汽車動力總成(PWT)应用如单缸或双缸马达的电子燃油喷射(EFI).SPC572L MCU嵌入了功能强大的通用时时器(GTM)模块计时器,用在EFI引擎管理系统,以保证精确地喷射和点火正时,对引擎排放和消耗性能具有直接的影响力.此外,器件还具有增强的特性如多种信号转换功能(爆燃监测,缸内压力信号预处理等),以及其综合的外设集,包括SENT和以太网接口.SPC572L64E具有PowerPC e200z2核,工作频率80MHz,并嵌入1.5MB闪存.满足AEC-Q100规范,单电源5 V +/-10%工作.本文介绍了SPC572L64E3主要特性,框图以及評估板SPC572L-DISP主要特性,电路图和材料清单.

SPC572L is part of our High-Performance class of 32-bit Automotive Power Architecture® microcontrollers (MCUs). It is designed for entry-line powertrain (PWT) applications such as electronic fuel injection (EFI) for mono- or bi-cylinder motors.

The SPC572L MCUs embeds the powerful GTM (Generic Timer Module) timer, used in EFI engine management systems to ensure accurate injection and ignition timings with a direct effect on engine emission and consumption performance. Moreover, the SPC572L includes enhanced features such as multiple signal conversion capabilities (knock detection, in-cylinder pressure signal preprocessing, etc.) and a comprehensive peripherals set, including SENT and Ethernet interfaces.

The SPC572L features a PowerPC e200z2 core operating at a frequency of 80 MHz and embeds 1.5 Mbytes of Flash memory. It is available in two package versions: in eTQFP100 (14 x 14 mm) and in a high pad pitch density eTQFP80 (10 x 10 mm) specifically fitting engine control units (ECU) with footprint optimization requirements.

SPC572L64E3主要特性:

AEC-Q100 qualified
One main 32-bit Power Architecture® VLECompliant CPU core, single issue
– Single-precision floating point operations
1568 KB on-chip RWW flash memory
– Supporting EEPROM emulation (32 KB)
64 KB general-purpose data SRAM
System Memory Protection Unit (SMPU)
Multi-channel direct memory access controllers(eDMA) with 16-channel for up to 60 DMAsources
Interrupt controller (INTC)
Four 32-bit and one 64-bit Periodic InterruptTimer channels (PIT)
Single phase-locked loops with stable clockdomain for peripherals and core (PLL)
System integration unit lite (SIUL2)
Boot assist flash (BAF) supports factoryprogramming through UART/LIN, CAN
Generic timer module (GTM101)
– Intelligent complex timer module
– 72 channels (16 input and 56 output)
Enhanced analog-to-digital converter systemwith:
– Three 12-bit SAR analog converters
– One 16-bit Sigma-Delta analog converters
Decimation unit to support SD ADC dataconditioning
Two deserial serial peripheral interface (DSPI)modules
Two LIN and UART communication interfaces(LINFlexD) modules
One s-bus channel (composed by one DSPIand one LINFlexD)
Four SENT channels
Two modular controller area network (M_CAN)modules
Fast Ethernet controller (FEC)
Fast Asynchronous Serial Transmission(LFAST)
Nexus development interface (NDI) per IEEEISTO5001-2003 standard, with some supportfor 2010 standard
Device and board test support per Joint TestAction Group (JTAG) (IEEE 1149.1 and IEEE1149.7)
Single 5 V+/-10% Power supply supportingcold start conditions (down to 3.0 V)
Self Test capability
Designed for eTQFP80 and eTQFP100

圖1.SPC572L64E3框圖

評估板SPC572L-DISP

The SPC572L-DISP board helps the user to discover the SPC572L64E3 microcontroller with full access to CPUs, GPI/O’s and peripherals such as CAN, FlexRay, LIN, UART at budget price. The discovery board includes a PLS debugger-programmer, two JTAG ports (2x7 - 0.1" and 2x5 0.05") and an extension headers array (4x37 pins) to connect prototyping boards or additional modules. UDE software is available for free download and includes a perpetual 256 Kbyte debugging/programming license. Free ready-to-run application firmware examples are available inside SPC5Studio (www.st.com/spc5studio) to support quick evaluation and development. SPC5Studio includes visual configurable code generation engine, board support package (BSP), startup routines, interrupt services. SPC5Studio is available for free download.

https://www.st.com/content/ccc/fragment/product_related/rpn_information/board_photo/group1/36/23/88/70/47/be/45/14/SPC572L-DISP/files/ST12854_SPC572L-DISP_top-scr.jpg/_jcr_content/translations/en.ST12854_SPC572L-DISP_top-scr.jpg
图2.評估板SPC572L-DISP外形图

評估板SPC572L-DISP主要特性:

SPC572L64E3 is 32-bit Power Architecture®VLE Compliant CPU core, single issue, single-precision floating-point operations. 1568 KB on-chip RWW flash memory. Supporting EEPROM emulation (32 KB).64 KB general-purpose data SRAM. System Memory Protection Unit (SMPU) Integrated programmer - debugger. 
Board Supply: 12V (ext PSU) and USB 
Integrated programmer - debugger. 
JTAG interface: standard 7x2 male 0.1" connector 
Mini JTAG connector: 2x5 0,05" 
1 CAN port with transceiver 
1 KLine with transceiver 
1 USB virtual COM Port 
3 LEDs for user purpose 
20 MHz crystal 
The GIPOs and pins accesible by a 4x37 0.1’’pin grid array 
Board size 153 x 102mm
SPC572L-DISP: SPC572L64E3

图3.評估板SPC572L-DISP电路图(1)

图4.評估板SPC572L-DISP电路图(2)

图5.評估板SPC572L-DISP电路图(3)

图6.評估板SPC572L-DISP电路图(4)

图7.評估板SPC572L-DISP电路图(5)

图8.評估板SPC572L-DISP电路图(6)

图9.評估板SPC572L-DISP电路图(7)

图10.評估板SPC572L-DISP电路图(8)
評估板SPC572L-DISP材料清单:


詳情請見:
https://www.st.com/content/ccc/resource/technical/layouts_and_diagrams/schematic_pack/group0/8b/ae/5d/0f/1c/7e/4b/a5/SPC572L-DISP/files/SPC572L-DISP__1v00.pdf/jcr:content/translations/en.SPC572L-DISP__1v00.pdf
和https://www.st.com/content/ccc/resource/technical/document/bill_of_materials/group0/df/8b/87/e9/17/b1/41/da/SPC572L-DISP/files/SPC572L-DISP_1v00_BOM.pdf/jcr:content/translations/en.SPC572L-DISP_1v00_BOM.pdf
en.SPC572L-DISP_1v00_BOM.pdf
en.SPC572L-DISP__1v00.pdf
spc572l64e3.zip

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